User:YOURUSERNAME/sandbox/Workflows

Step-by-step fabrication guides for common device types — showing which UQ facility and instrument you need at each stage.

Facility Key
CMM	Hawken Building
ANFF-Q	AIBN Building
SMP	Parnell Building
Long Pocket	Long Pocket Campus
COPE	SCMB Building

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Bio-MEMS — Microfluidics & Bio-Optomechanics

Workflows for microfluidic lab-on-chip devices, PDMS channel fabrication, and optomechanical biosensors. Sub-workflows range from pure soft lithography (no EBL) through to high-resolution EBL-defined features combined with deep silicon etching.

Workflow 1 — PDMS Soft Lithography Microfluidic Chip

The standard route for PDMS lab-on-chip devices. SU-8 master fabricated at Long Pocket or ANFF-Q, PDMS cast and bonded to glass. No EBL needed for features >5 µm.

Facility route: Long Pocket → Long Pocket → Long Pocket → ANFF-Q → Long Pocket

Steps

1. Design and Print Photomask
   Design channel layout in CAD (AutoCAD, KLayout, or L-Edit). Print a chrome or film photomask, or use ANFF-Q's direct-write laser system to pattern the master mould directly — skipping the physical mask entirely for prototyping.
2. SU-8 Master Fabrication
   Spin SU-8 negative photoresist onto a silicon wafer. UV-expose through photomask. Post-exposure bake, then develop to reveal raised SU-8 channel features. Feature height is set by SU-8 thickness (spin speed).
3. PDMS Moulding and Curing
   Silanise master mould to prevent PDMS adhesion. Mix PDMS base:crosslinker (10:1), degas, pour over master, and cure at 65–80 °C. Peel off cured PDMS slab and punch inlet/outlet holes.
4. O₂ Plasma Activation and Bonding
   Activate PDMS and glass substrate surfaces with O₂ plasma. Immediately bring surfaces into contact to form irreversible covalent bonds. Bake at 80 °C for 30 min to complete bonding.
5. Device Testing and Characterisation
   Verify channel dimensions by confocal or optical microscopy. Test fluidic connections and flow profiles. For integrated electrodes or sensors, use ANFF-Q probe station for electrical characterisation.

Summary

Parameter	Detail
Typical timeline	Master fabrication: 1 day · PDMS casting + curing: 4–12 hrs · Bonding + test: 2–4 hrs · Total: 2–3 days
Primary facility	Long Pocket cleanroom
Supporting facility	ANFF-Q (AIBN) — plasma / alternative
Key instruments	SU-8 stream (ANFF-Q) · Microfluidics platform (ANFF-Q) · O₂ plasma cleaner (ANFF-Q) · Soft lithography tools (ANFF-Q)

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Workflow 2 — Thermoplastic Microfluidics via Hot Embossing

Hot embossing of thermoplastic substrates (COC, PMMA, PC) using a silicon or SU-8 master. Better for mass replication than PDMS. Requires ANFF-Q hot embosser.

Facility route: ANFF-Q → ANFF-Q → ANFF-Q → ANFF-Q

Steps

1. Si or SU-8 Master Fabrication
   Fabricate a rigid master mould from silicon (via DRIE) or SU-8. Silicon masters give higher feature fidelity and longer lifetime. DRIE provides high-aspect-ratio features with vertical sidewalls.
2. Hot Embossing
   Load thermoplastic substrate and master into the hot embosser. Heat above glass transition temperature (Tg), apply pressure to imprint features, cool under pressure, then demould. ANFF-Q hot embosser handles COC, PMMA, and PC.
3. Drilling / Punching Inlets
   Drill or punch fluidic access holes in the embossed substrate using a micro-drill press or laser micromachining system.
4. Thermal / Solvent Bonding
   Bond embossed substrate to lid layer by thermal bonding (just below Tg) or solvent-assisted bonding. Seal channels and verify under microscope.

Summary

Parameter	Detail
Primary facility	ANFF-Q (AIBN)
Key instruments	Hot embosser (ANFF-Q) · DRIE (ANFF-Q) · Oxford Lasers micromachining

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Workflow 3 — EBL-Defined Nanoscale Features in Microfluidic Devices

For sub-micron features (nanochannels, nanofilters, plasmonic sensors in microfluidics). Combines EBL at CMM with DRIE or RIE at ANFF-Q, then PDMS integration at Long Pocket.

Facility route: CMM → CMM → ANFF-Q → CMM → Long Pocket

Steps

1. Resist Coat and EBL Exposure
   Plasma clean substrate, spin coat ZEP520A or PMMA, bake. Expose nano-features using EBPG5150 (100 kV) for sub-100 nm features. Use eLINE Plus for CD-SEM verification of pattern dimensions.
2. Develop and Inspect
   Develop in ZED-N50 (ZEP) or MIBK:IPA (PMMA). Rinse and dry. Inspect pattern quality and critical dimensions using eLINE Plus CD-SEM or Filmtek for resist thickness confirmation.
3. Etch or Metal Deposition
   For nanochannels: RIE to transfer pattern into Si or SiO₂. For plasmonic nanostructures: e-beam evaporation of Au/Ti followed by lift-off. DRIE for deep features or through-wafer channels.
4. Metrology — Verify Etch Depth and Feature Size
   Measure etch depth with Dektak XT (contact profilometer) or OLS5500 confocal. Verify sidewall quality with AFM if needed.
5. PDMS Integration and Bonding
   Integrate patterned substrate with PDMS microfluidic channels. Plasma activate both surfaces and bond. Verify channel alignment and seal integrity.

Summary

Parameter	Detail
Facilities	CMM (Hawken) — EBL · ANFF-Q (AIBN) — etch/dep. · Long Pocket — PDMS
Key instruments	Raith EBPG5150 (100 kV) · eLINE Plus (CD-SEM) · Oxford RIE · DRIE (ANFF-Q)

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Workflow 4 — Bio-Optomechanical Devices (Nanobeams, Membranes, Optical Traps)

Suspended SiNx or Si nanobeams and membranes for optomechanical sensing of biological specimens. High-resolution EBL for nanoscale features, DRIE/XeF₂ for device release.

Facility route: ANFF-Q → CMM → ANFF-Q → ANFF-Q → CMM

Steps

1. SiNx or Si Device Layer Deposition
   Deposit low-stress silicon nitride (SiNx) via ICP-CVD or LPCVD. Thickness defines mechanical properties (resonance frequency, Q-factor). For SOI devices, use commercial SOI wafers.
2. EBL Patterning of Nanobeams / Membrane Features
   Spin HSQ or ZEP on device layer. Expose nanoscale beam and hole patterns using EBPG5150 at 100 kV. Beam widths typically 100–500 nm; holes <200 nm for photonic crystal membranes.
3. RIE Etch of Device Layer
   Transfer EBL pattern into SiNx or Si device layer by RIE. Use SF₆/CHF₃ chemistry for SiNx. Vertical, anisotropic etch critical for well-defined device geometry.
4. Device Release
   Release suspended structures by selectively removing the sacrificial oxide layer. XeF₂ or vapour HF for isotropic SiO₂ undercut and release without stiction. Critical step — handle carefully to avoid collapse.
5. Metrology — Verify Dimensions and Surface Quality
   Image released structures with SEM to verify beam dimensions and undercut. Measure surface roughness via AFM. Use OLS5500 for non-contact topography of fragile released devices.

Summary

Parameter	Detail
Facilities	CMM (Hawken) — EBL · ANFF-Q (AIBN) — dep./etch
Key instruments	Raith EBPG5150 (100 kV) · ICP-CVD (ANFF-Q) · XeF₂ etcher (ANFF-Q) · PRIMAXX vapour HF

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Photonics — Si Photonics, Metalenses, Integrated Photonics

Nanofabrication workflows for integrated photonic devices. EBL at CMM is the primary patterning tool for sub-100 nm waveguides, gratings, and metasurface elements. RIE at ANFF-Q for pattern transfer.

Workflow 1 — Silicon Photonics: Waveguides, Ring Resonators, Grating Couplers

EBL-defined silicon-on-insulator (SOI) waveguide devices. Critical dimensions typically 200–500 nm width. ZEP or HSQ as hard mask for high-quality sidewalls after ICP-RIE.

Facility route: CMM → CMM → ANFF-Q → CMM → ANFF-Q

Steps

1. Substrate Prep and Resist Coating
   Clean SOI wafer in Diener plasma cleaner to remove organics. Spin ZEP520A (positive-tone etch mask) or HSQ 6% (negative-tone high-resolution hard mask). Bake on CEE Apogee hotplate.
2. EBL Exposure — Waveguides and Grating Couplers
   Expose waveguide layout at 100 kV on EBPG5150. Use proximity correction (BEAMER) for dense grating coupler regions. Typical dose: 160–200 µC/cm² for ZEP at 100 kV. Verify CD with eLINE Plus after develop.
3. ICP / RIE Etch of Si Device Layer
   Transfer waveguide pattern into Si device layer by ICP or RIE using HBr/Cl₂ or SF₆/C₄F₈ chemistry. Etch depth = Si layer thickness (typically 220 nm for standard SOI). Sidewall angle and roughness are critical for propagation loss.
4. Metrology — SEM Inspection and Profilometry
   Inspect waveguide cross-section in SEM to verify etch depth and sidewall angle. Measure step height with Dektak XT. Surface roughness via AFM — critical for propagation loss estimation.
5. Optional: SiO₂ Cladding Deposition
   Deposit upper SiO₂ cladding by ICP-CVD or sputtering to achieve symmetric waveguide mode and protect device. Index matching between core and cladding determines mode confinement.

Summary

Parameter	Detail
Facilities	CMM (Hawken) — EBL + metrology · ANFF-Q (AIBN) — etch/dep.
Key instruments	Raith EBPG5150 (100 kV) · eLINE Plus (CD-SEM) · Oxford RIE · ICP-CVD (ANFF-Q)
Typical resists	ZEP520A (positive, etch mask) · HSQ 6% (negative, hard mask) · PMMA (lift-off for metal contacts)

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Workflow 2 — Metalens and Metasurfaces: TiO₂, GaN, Si Nanopillars

High-aspect-ratio dielectric nanopillars (TiO₂, GaN, or Si) patterned by EBL and etched for flat optics applications. Sub-100 nm pillar diameters with high aspect ratios require careful etch optimisation.

Facility route: ANFF-Q → CMM → CMM → ANFF-Q → CMM

Steps

1. Device Layer Deposition (TiO₂ / GaN / Si)
   Deposit high-index dielectric layer by sputtering (TiO₂, SiNx) or CVD. Layer thickness defines pillar height and operating wavelength. ALD-deposited TiO₂ preferred for visible-wavelength metalenses.
2. HSQ Hard Mask Exposure (EBPG5150)
   Spin HSQ negative-tone resist directly on device layer. Expose pillar array at 100 kV — high dose (1,200–1,800 µC/cm²) required. HSQ acts as a hard mask with excellent etch selectivity. Dense pillar arrays benefit from proximity correction.
3. Develop and CD-SEM Verification
   Develop in TMAH 25%. HSQ crosslinks to SiO₂-like material — undeveloped HSQ dissolves. Image pillar pattern in eLINE Plus CD-SEM to verify diameter, pitch, and dose-related deviations before etching.
4. High-Aspect-Ratio RIE Etch of Pillars
   Etch device layer through HSQ mask using Cl₂/BCl₃ (TiO₂, GaN) or HBr/SF₆ (Si). Target aspect ratio 10:1 or greater. Sidewall passivation chemistry critical for vertical profiles. Contact ANFF-Q staff for chemistry advice.
5. SEM / AFM Characterisation of Pillar Array
   Image pillar array in SEM — tilt view to assess sidewall angle and height. FIB cross-section for precise aspect ratio measurement. AFM for surface roughness on pillar tops.

Summary

Parameter	Detail
Facilities	CMM (Hawken) — EBL + SEM · ANFF-Q (AIBN) — dep./etch
Key instruments	Raith EBPG5150 — HSQ exposure · eLINE Plus — CD-SEM · Sputtering system (ANFF-Q) · Oxford RIE (ANFF-Q)

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Workflow 3 — Plasmonic Nanostructures: Gold Nanoantennas, Bow-Ties, Nanogaps

EBL lift-off of Au/Ti nanostructures for SERS, near-field enhancement, and optical antenna applications. Sub-50 nm gap features achievable at 100 kV.

Facility route: CMM → CMM → ANFF-Q → CMM → ANFF-Q

Steps

1. Bilayer PMMA Resist Coat
   Spin PMMA A2 (lower layer) then A4 (upper layer) to create a controlled undercut profile. Bake between layers. Undercut ensures clean lift-off separation.
2. EBL Exposure and Develop
   Expose nanoantenna patterns at 100 kV. Dose ~350–400 µC/cm² for PMMA A4 on SiO₂. Develop in MIBK:IPA 1:3 for 60 s at 23 °C. Inspect gaps in eLINE CD-SEM before proceeding.
3. Au / Ti E-Beam Evaporation
   Deposit 2–5 nm Ti adhesion layer, then 20–50 nm Au by e-beam evaporation. Low deposition rate (<0.5 Å/s) for Au to minimise resist heating. Keep total metal thickness well below resist thickness for clean lift-off.
4. Lift-Off in Acetone
   Soak in acetone (or NMP for stubborn lift-off) to dissolve PMMA and remove metal from unwanted areas. Ultrasonication at low power assists lift-off without damaging structures. Rinse in IPA, dry.
5. SEM Characterisation and Gap Verification
   Image nanoantenna array in SEM. Verify gap dimensions and structure quality. Use WITec Raman-AFM-SNOM for optical near-field characterisation if needed.

Summary

Parameter	Detail
Facilities	CMM (Hawken) — EBL · ANFF-Q (AIBN) — dep./SEM
Key instruments	Raith EBPG5150 · eLINE Plus (CD-SEM) · E-beam evaporation (ANFF-Q) · JEOL IT-300 SEM (ANFF-Q) · WITec Raman-AFM-SNOM

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MEMS — Bulk and Surface Micromachining

Fabrication workflows for MEMS devices including cantilevers, membranes, accelerometers, and resonators. Relies on ANFF-Q DRIE for deep Si etching and XeF₂ / vapour HF for device release.

Workflow 1 — Si / SiNx Cantilevers and Mechanical Resonators

Fabrication of free-standing cantilevers and doubly-clamped beams by top-down lithography and wet or dry release. Used for AFM probes, mass sensors, and optomechanical resonators.

Facility route: ANFF-Q → CMM → ANFF-Q → ANFF-Q → CMM

Steps

1. SiNx Device Layer Deposition
   Deposit low-stress SiNx by LPCVD or ICP-CVD on Si/SiO₂ substrate. Stress control is critical — stoichiometry determines residual stress and resonance frequency of the final beam.
2. EBL or Optical Lithography Patterning
   For sub-micron beam widths use EBPG5150 with ZEP or HSQ. For beams >1 µm, ANFF-Q photolithography is sufficient and faster. Pattern defines beam outline and any integrated nanostructures (holes, tips).
3. RIE Etch of SiNx Layer
   Etch SiNx through resist mask using CHF₃/O₂ or SF₆/CHF₃ chemistry in RIE. Timed etch — stop on SiO₂ or Si substrate. Vertical sidewalls important for well-defined beam geometry.
4. Sacrificial Layer Release (XeF₂ or Vapour HF)
   Isotropically etch sacrificial oxide beneath SiNx beam to release free-standing structure. XeF₂ for Si undercut; vapour HF (PRIMAXX) for SiO₂ sacrificial layer. Both are dry-release processes — no stiction vs wet KOH.
5. SEM and AFM Characterisation
   Image released cantilever in SEM to verify geometry and suspension. Measure surface roughness and beam profile with AFM. Tilted SEM view confirms undercut and beam suspension.

Summary

Parameter	Detail
Primary facility	ANFF-Q (AIBN)
Supporting	CMM (Hawken) — EBL (optional for sub-micron beams)
Key instruments	LPCVD furnace (ANFF-Q) · XeF₂ etcher (ANFF-Q) · PRIMAXX vapour HF · Oxford RIE (ANFF-Q)

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Workflow 2 — Bulk Si Micromachining: Deep Trenches, Through-Wafer Vias, Pressure Membranes

DRIE Bosch process for high-aspect-ratio features in bulk silicon. Used for pressure sensors, inertial MEMS, and microfluidic master moulds.

Facility route: ANFF-Q → ANFF-Q → ANFF-Q → CMM

Steps

1. Hard Mask Deposition and Patterning
   Deposit SiO₂ or SiNx hard mask by ICP-CVD. Pattern by photolithography (ANFF-Q) for features >1 µm or EBL (CMM) for sub-micron. Etch hard mask in RIE before DRIE.
2. DRIE — Bosch Process
   Alternating SF₆ etch / C₄F₈ passivation cycles to achieve vertical deep Si etching. Etch rate ~5–10 µm/min. Sidewall scalloping is characteristic — controllable by cycle parameters. Contact ANFF-Q staff for recipe advice.
3. Hard Mask Strip and Dicing
   Strip hard mask in BOE (SiO₂) or H₃PO₄ (SiNx). Dice wafer into individual dies using dicing saw. Clean dies in piranha or standard RCA clean.
4. Metrology — Etch Depth and Profile
   Measure etch depth with Dektak XT or OLS5500 (non-contact). FIB cross-section in SEM for sidewall profile assessment and scallop measurement.

Summary

Parameter	Detail
Primary facility	ANFF-Q (AIBN)
Metrology	CMM (Hawken)
Key instruments	DRIE — Bosch process (ANFF-Q) · Dicing saw (ANFF-Q) · Dektak XT profilometer

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Workflow 3 — Surface Micromachining: Polysilicon over Sacrificial Oxide

Classic surface MEMS process: poly-Si structural layer deposited over sacrificial SiO₂, patterned, then released by HF etching. Suitable for actuators, comb drives, and gyroscopes.

Facility route: ANFF-Q → ANFF-Q → ANFF-Q → ANFF-Q → ANFF-Q

Steps

1. Sacrificial Oxide Deposition
   Grow or deposit SiO₂ sacrificial layer (thermal oxidation or ICP-CVD). Thickness determines the released gap between structural layer and substrate. Typically 0.5–2 µm.
2. Poly-Si Structural Layer Deposition
   Deposit doped polysilicon by LPCVD. Thickness = structural layer thickness (typically 1–5 µm). Anneal to reduce residual stress. Doping ensures electrical conductivity for electrostatic actuation.
3. Pattern Poly-Si Structural Layer
   Coat with photoresist (ANFF-Q photolithography suite) and pattern structural features — comb fingers, springs, anchor points. RIE etch poly-Si using SF₆ or HBr chemistry.
4. Contact Metal Deposition and Patterning
   Deposit Al or Au contact pads by e-beam evaporation and pattern by lift-off or wet etch. Contacts to anchored regions only — flying structures must remain free.
5. Sacrificial Oxide Release (Vapour HF)
   Selectively etch sacrificial SiO₂ using PRIMAXX vapour HF. Isotropic etch undercuts structural poly-Si to release moving parts. Dry release avoids stiction from surface tension. Etch time determines undercut extent — design release holes in structural layer accordingly.

Summary

Parameter	Detail
Primary facility	ANFF-Q (AIBN) — all steps
Key instruments	LPCVD furnace (ANFF-Q) · PRIMAXX vapour HF · RIE (ANFF-Q) · E-beam evaporation (ANFF-Q)

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Quantum Devices — Superconducting Qubits, Spin Qubits, NV Centres

High-resolution EBL at CMM combined with superconducting metal deposition at SMP. Multi-facility workflow requiring coordination between CMM (EBPG5150) and SMP (angle evaporation).

Workflow 1 — Transmon Qubit: Al/AlOx/Al Dolan Bridge Josephson Junctions

The standard Al double-angle evaporation process for transmon qubits. PMMA bilayer EBL at CMM followed by Al angle evaporation at SMP to form the AlOx tunnel barrier junction.

Facility route: CMM → CMM → CMM → SMP → SMP → CMM

Steps

1. Substrate Clean and PMMA Bilayer Coat
   Clean Si or sapphire substrate in Diener O₂/Ar plasma. Spin PMMA A2 (lower layer, softer — gives undercut) then PMMA A4 (upper layer, higher MW). Bake each layer on CEE Apogee hotplate. Bilayer essential for Dolan bridge geometry.
2. EBPG5150 EBL — Qubit and Junction Pattern
   Expose qubit geometry (capacitor pads, coupling lines) and Dolan bridge at 100 kV. Junction bridge typically 100–200 nm wide. Dose ~350–400 µC/cm² for PMMA A4. Use BEAMER proximity correction for the dense junction region.
3. Develop and Inspect
   Develop in MIBK:IPA 1:3 for 60–75 s at 23 °C. The bilayer creates a controlled undercut in the A2 layer. Inspect Dolan bridge dimensions in eLINE CD-SEM — bridge width and undercut are critical for junction area and Josephson energy.
4. Double-Angle Al Evaporation at SMP
   Transfer sample to SMP superconducting evaporator. Evaporate first Al layer at +angle (e.g. +17°), oxidise in controlled O₂/Ar to form AlOx tunnel barrier, then evaporate second Al layer at −angle. The two layers overlap only under the bridge — this is the Josephson junction.
5. Lift-Off
   Soak in acetone or NMP to dissolve PMMA and remove unwanted Al. Gentle ultrasonic agitation. Rinse in IPA. The junction and qubit geometry remain. Inspect in optical microscope before SEM.
6. SEM Inspection and Metrology
   Image junction in SEM to verify bridge geometry and overlap area. Junction normal resistance (Rn) measured electrically at room temperature to estimate Josephson energy. FIB cross-section if oxide layer characterisation needed.

Summary

Parameter	Detail
Facilities	CMM (Hawken) — EBL · SMP (Parnell) — Al evaporation
Key instruments	Raith EBPG5150 (100 kV) · eLINE Plus (CD-SEM) · SMP superconducting evaporator
Critical parameters	Bridge width: 100–200 nm · Al₁: ~30 nm · Oxidation: O₂/Ar 1–10 min · Al₂: ~60 nm · Target Rn: 5–15 kΩ

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Workflow 2 — Nb / NbTiN Microwave Resonators and Feedlines

Coplanar waveguide resonators and transmission lines in Nb or NbTiN for qubit readout circuits. EBL-defined at CMM, Nb deposited at SMP.

Facility route: SMP → CMM → ANFF-Q → CMM

Steps

1. Nb or NbTiN Film Deposition at SMP
   Deposit Nb or NbTiN on Si or sapphire substrate at SMP. Film thickness = device layer thickness (typically 50–200 nm). Film quality (Tc, residual resistance) critical for resonator Q-factor.
2. EBL Patterning of Resonator Geometry
   Coat with ZEP520A. Expose CPW resonator pattern (50 Ω gaps typically 4–10 µm) plus any sub-micron features at 100 kV on EBPG5150. Develop in ZED-N50.
3. Nb RIE Etch
   Transfer pattern into Nb film by RIE using SF₆/Ar or CF₄/O₂ chemistry. Timed etch — stop on Si/sapphire substrate. Nb is a hard material — expect lower etch rates than Si.
4. SEM Inspection
   Verify CPW gap dimensions and feature quality in SEM. Measure Nb film thickness via Dektak XT step height on a test area.

Summary

Parameter	Detail
Facilities	SMP (Parnell) — Nb dep. · CMM (Hawken) — EBL · ANFF-Q (AIBN) — etch
Key instruments	SMP superconducting evaporator · Raith EBPG5150 (100 kV) · Oxford RIE (ANFF-Q)

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Organic Electronics — OLEDs, OPVs, Perovskite Devices

Fabrication workflows for organic light-emitting devices, organic photovoltaics, and perovskite solar cells. Primarily the COPE cleanroom at SCMB with supporting characterisation at ANFF-Q.

Workflow 1 — Small-Molecule OLED: ITO / HTL / EML / ETL / Al Cathode

Standard vacuum-deposited small-molecule OLED stack. All organic layers deposited by thermal evaporation in COPE cleanroom. ITO anode patterned by photolithography at ANFF-Q.

Facility route: ANFF-Q → COPE → COPE → ANFF-Q

Steps

1. ITO Anode Deposition and Patterning
   Deposit ITO by sputtering at ANFF-Q. Pattern anode geometry by photolithography and wet etch. Clean ITO surface thoroughly — O₂ plasma treatment (ANFF-Q Tergeo cleaner) before organic deposition to improve wettability and hole injection.
2. Organic Layer Deposition (COPE Evaporator)
   Sequentially deposit HTL (e.g. NPB), EML (host:guest system), ETL (e.g. Alq3), and LiF electron injection layer by thermal evaporation in COPE cleanroom under high vacuum. Each layer deposited through shadow masks.
3. Al Cathode Deposition and Device Testing
   Deposit Al cathode through shadow mask without breaking vacuum. Test device J-V characteristics, luminance, and EL spectra using in-cleanroom probe station at COPE.
4. Optical and Electrical Characterisation
   Full device characterisation at ANFF-Q: EL spectrum, CIE coordinates, efficiency (cd/A, lm/W). Solar simulator for OLED degradation studies. Confocal microscopy for emission uniformity.

Summary

Parameter	Detail
Primary facility	COPE (SCMB)
Supporting	ANFF-Q (AIBN) — ITO / characterisation
Key instruments	COPE organic thermal evaporator · Sputtering system (ANFF-Q) · Tergeo plasma cleaner (ANFF-Q) · Semiconductor analyser (ANFF-Q)

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Workflow 2 — Perovskite Solar Cell: n-i-p Planar Architecture

Solution-processed perovskite absorber with TiO₂ electron transport layer and spiro-OMeTAD hole transport layer. Spin coating at COPE cleanroom.

Facility route: ANFF-Q → COPE → COPE → ANFF-Q

Steps

1. ITO Substrate Preparation
   Clean ITO-coated glass by sequential sonication in acetone, IPA, and deionised water. O₂ plasma clean (ANFF-Q Tergeo) immediately before deposition to improve surface energy.
2. ETL and Perovskite Spin Coating
   Spin coat compact TiO₂ ETL (titanium isopropoxide in ethanol), anneal at 500 °C. Spin coat perovskite precursor solution (MAPbI₃ or mixed-halide) in glovebox or controlled atmosphere. Anti-solvent drip during spinning. Anneal at 100 °C.
3. HTL and Au Contact Deposition
   Spin coat spiro-OMeTAD HTL. Evaporate Au back contact in COPE evaporator through shadow mask. Encapsulate device to prevent moisture degradation.
4. J-V and IPCE Characterisation
   Measure PCE, Voc, Jsc, FF using Class AAA solar simulator. Measure IPCE/EQE spectrum. Stability testing under continuous illumination.

Summary

Parameter	Detail
Primary facility	COPE (SCMB)
Supporting	ANFF-Q (AIBN) — characterisation
Key instruments	COPE spin coater (glovebox) · COPE evaporator · Class AAA solar simulator (ANFF-Q) · QE/IPCE/IV system (ANFF-Q) · Tergeo plasma cleaner (ANFF-Q)

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